vak: (Default)
Serge Vakulenko ([personal profile] vak) wrote 2019-03-02 09:17 pm (UTC)

Приведу цитату со StackExchange:

None of these chips (likewise 6800 and 6502) use microcode the same way as it's used today. The decoding isn't as strictly separated from execution logic.

Example 1: 6502

The 6502, for example, has a 'rather' simple structure built from a timing circuit counting instruction cycle and an instruction register, followed by a decoder PLA where instruction plus timing information is transformed into control signals which are fed into the execution units.

The cycle counter starts at 0 and shifts (!) through the maximum 7 states. When an instruction ends, it gets reset to zero for the next one. The 6502 PLA is essentially a one-dimensional decoder transforming the combined instruction plus state into one or more control signals for the execution units. Since the PLA allows partial decoding, one entry can fire on different instructions. For example, all instructions loading the second byte as immediate share one single PLA entry (microcode line). In comparison with textbook microcode engines, this is equivalent to a kind of compressed microcode.

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